As the integration degree in a semiconductor device becomes higher, interconnect spacing inside the device becomes narrower. Accordingly, a manufacturing method thereof is required to have higher precision. For example, in the side wall process, which is used for forming interconnects, a loop shaped metal layer on a insulating layer is cut by etching, providing two interconnects that are adjacent to one another and electrically isolated. In this process, the etching is desired to be suppressed in the insulating layer.